A NOR gate can be derived from ______
1.NAND gate
2.XOR gate
3.AND gate
4.OR gate
A __________ gate gives the output as 1 only if all the inputs signals are 1.
1.AND
2.OR
3.EXOR
4.NOR
Conversion from prefix to postfix expression can be done _______________
1.using bubble sort
2.using radix sort
3.using two queues
4.in a direct manner
Different parameter optimization is easily achievable in
1.nMOS
2.pMOS
3.pseudo nMOS
4. CMOS
Electronic circuits that operate on one or more input signals to produce standard output _______
1.Series circuits
2.Parallel Circuits
3.Logic Signals
4.Logic Gates
Equalizing of rise time and fall time is possible in
1.nMOS
2. pseudo nMOS
3. pseudo nMOS
4.pMOS
Evaluation of 4*5+3/2-9 in prefix notation.
1.*45-/32+9
2.*+453/-29
3.-+*45/329
4.*+/45932
Evaluation of expression a/b+c*d-e in postfix notation.
1.ab+cd/*-e
2.ab/cd*+e-
3.abc/+d*-e
4.abcd/+*-e
For minimum D consider
1.Ln = Lp = 2λ
2.Ln greater than Lp = 2λ
3. Lp greater than Ln
4.Lp = 2Ln
High and low noise margins can be equalized by
1.βn = βp
2.βn greater than βp
3.βn lesser than βp
4.Lp = 2Ln
How many NAND gates are required to make an XOR gate?
1.7
2.12
3. 4
4.8
In BiCMOS inverter, the BJT used are __________
1.Only Npn BJT
2.Only Pnp BJT
3.Both npn and pnp BJT
4.Multi emitter npn BJT
In BiCMOS, the analysis of the operation of BJT is well explained by ___________
1.RC Model
2.Emitter resister model
3.Ebers Moll Model d) Hybrid model
4.Ebers Moll Model d) Hybrid model
In Boolean algebra, the data is a bit-representation of information consists of _________
1.0 and 1
2.2 and 5
3.1 and 15
4.4 and 8
In infix to postfix conversion algorithm, the operators are associated from?
1.right to left
2.left to right
3.centre to left
4.centre to right
In Multiplexer gate, for selecting the inputs, two bits named _____ and _____ are required generally.
1.selector bit, data bit
2.parity bit. Generator bit
3.input bit, inverted bit
4.raising bit, sinking bit
In OR gate for 13 numbers of inputs what are the stages possible for it?
1.1239
2.213
3.13
4.1387
In order to make a luggage security alarm, a single _____ is used.
1.NOR gate
2.NAND gate
3.X-NOR gate
4.XOR gate
In which logic gate the output state is usually the complement of the input state?
1.NOT gate
2.NOR gate
3.X-NOR gate d) OR gate
4.X-NOR gate d) OR gate
Infix to prefix conversion can be done using __________
1.two queues
2.two stacks
3.one stack and two queues
4. one stack
Inverter pair delay D is given as equal to
1.tr
2.tf
3.tr-tf
4.tr+tf
Prefix expression can be evaluated _________
1.from right to left
2.from left to right
3.from the exact middle
4.from second right element
Rise time and fall time can be also equalized by
1.Lp = Ln = λ
2.Lp = Ln = λ/2
3.Lp = Ln = 2λ
4.2Lp = Ln = λ
The BiCMOS are preferred over CMOS due to ______________
1.Switching speed is more compared to CMOS
2.Sensitivity is less with respect to the load capacitance
3.High current drive capability
4.All of the mentioned
The Bipolar Transistor is fabricated on __________
1.Same substrate of nMOS
2.N-well in p Substrate
3.P-well in n Substrate
4.Same substrate of pMOS
The boolean expression of an OR gate is _______
1.A.B
2.A’B+AB’
3.A+B
4.A’B’
The collector contact region is doped with higher concentration of n-type impurities due to __________
1.It creates a depletion region at the contact surface
2.It creates a low conductivity path between collector region and contact
3.It reduces contact resistance
4.It can withstand high voltages as compared to collector region
The expression of an EXOR gate is ____________
1.A’B+AB’
2.AB+A’B’
3.A+A.B
4.A’+B’
The gate which is called an inverter is called _________
1.NOR
2.NAND
3.EXOR
4.NOT
The gate which is used to reverse the output obtained is _____
1.NOR
2.NAND
3.EXOR
4.NOT
The high current driving capability of the BiCMOS is due to __________
1.NMOS in saturation mode
2.PMOS in saturation mode
3. CMOS
4.BJT
The n-well collector is formed by __________
1.Lightly doped n-type epitaxial layer on p-Substrate
2.Heavily doped n-type epitaxial layer on p-Substrate
3.Lightly doped n-type diffused layer on p-Substrate
4.Heavily doped n-type diffused layer on p-Substrate
The n-well created for Bipolar Transistor in BiCMOS is used as __________
1.Substrate
2.Collector
3.Emitter
4.None of the mentioned
The transistors used in BiCMOS are __________
1.BJT
2.MOSFET
3.Both BJT and MOSFETs
4. JFET
The universal gate that can be used to implement any Boolean expression is __________
1.NAND
2.EXOR
3.OR
4.AND
Using which component a shift register is implemented?
1.register
2.transistor
3.latch
4. flip-flop
What is the postfix expression of (A+B)-C*(D/E))+F?
1.A B + C D E / * – F +
2.A B C D E + / * F – +
3.A B C + * D E / F + –
4.A B + C – * D E / F +
What is the postfix expression of 9+3*5/(10-4)?
1.9 3 + * 5 / 10 4 –
2.9 3 5 + * / 10 4 –
3.9 3 + 5 * / 10 4 –
4.9 3 5 * / + 10 – 4
What is the postfix expression of the given expression, (2*4-(5+7/3^4)-8)10?
1.2 4 5 * 7 3 4 ^ / + 8 – – 10
2.2 4 * ^ 5 7 3 4 / + 8 10 – –
3.2 4 * 5 7 ^ 3 4 / + – 8 10 –
4.2 4 * 5 7 3 4 ^ / + – 8 – 10
What is the work of BJT in BiCMOS?
1.Current controlled Voltage source
2.Voltage controlled Current source
3.Current controlled current source
4.Voltage controlled current source
What should be done when a left parenthesis ‘(‘ is encountered?
1.It is ignored
2.It is placed in the output
3.It is placed in the operator stack
4.The contents of the operator stack is emptied
When logic gates are connected to form a gating/logic network it is called as a ______________ logic circuit.
1.combinational
2.sequential
3.systematic
4.hardwired
When Zp.d. or Zp.u. increases, delay
1.increases
2.decreases
3.remains the same
4. delay becomes zero
Which of the following gate will give a 0 when both of its inputs are 1?
1.AND
2.OR
3.NAND
4.EXOR
Which of the following gates is used to implement a logical conditional?
1.OR gate
2.Magnetic logic gate
3.XOR gate
4.IMPLY gate
Which of the following gates is used to implement a logical conditional?
1.OR gate
2.Magnetic logic gate
3.XOR gate
4. IMPLY gate
Which of the following is an infix expression?
1.(a+b)*(c+d)
2.ab+c*
3. +ab
4.abc+*
Which of the following is built exclusively from NOR gate?
1.Plant guard machine
2.Apollo Guidance Computer
3.Street market app
4.Dish washer
Which of the following is the drawback of the BiCMOS circuits?
1.Sensitivity is less load capacitance
2.Bipolar transistors are used for driving current to the load capacitance but not for the logic operations
3.Increased fabrication Complexity
4.All of the mentioned
Which of the following statement is incorrect with respect to infix to postfix conversion algorithm?
1.operand is always placed in the output
2.operator is placed in the stack when the stack operator has lower precedence
3.parenthesis are included in the output d) higher and equal priority operators follow the same condition
4.higher and equal priority operators follow the same condition